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TPS65094: DRVL and PGNDSNS route when FET is far from PMIC

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Part Number:TPS65094

Dear Sir,

    I found PGNDSNS is sensitive signal and DRVL is aggressive signal in Layout Checklist.

    In intel's design 560683-apl-rvp-crb-lpddr3-ti-tdk-rev2p0, DRVL is parallel to PGNDSNS,is it wrong?


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