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BQ29700EVM-610: Doubts about series connection, reverse voltage protection and protection circuit levels

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Part Number:BQ29700EVM-610

I now that this integrated circuit is a first level battery protection device and usually it is embedded in the battery protection circuit, but can I use it as a second level protection circuit?
I mean, in my circuit design I want to provide the possibility to use (removable) batteries without built-in protection circuit, so I thought to utilize the BQ29700 in my PCB. Can I do it?

For the batteries that already have a built-in protection circuit, I think it could be seen as a redundancy circuit.

If it is possible, do I have to implement reverse voltage protection diodes?

Another doubt is that for my project I need 2 series cell battery pack (7,4V LiPo), but the BQ29700 IC is suitable only for single cell batteries, so, can I stuck two BQ29700 in series and each protection IC is in parallel with its battery? I attach the block diagram of what I have in mind:

Any suggestion?

Thank you for your attention.


BQ24074: Question of device operation

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Part Number:BQ24074

Hi

I have two question about bq24074 operation.

Could you please check the following file and please give me feedback?

(Please visit the site to view this file)

The followings is extract of the question from upper file.

Question 1.

Is this correct behavior for charger that the voltage at BAT is observed when /CE is high?

Question 2.

The pulse of which the period is 529msec is observed at CH1:BAT.

However, CHG is not changed.

Is it correct behavior?

BestRegards

TPS2511-Q1: How to design TPS2511 of hardware

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Part Number:TPS2511-Q1

Dear TI,

I am examining TPS2511-Q1 for USB charger of vehicle.

I have some questions.

1. When I checked EVM, Rilim is applied 1/10W(1608 size).

    Should I apply 1608 size for Rilim?

2. When I checked document of SLVA800(Effective system ESD protection guidelines), Ferrite Bead was applied(figure 4) 2012 size for D+ and D-.

    Why there are applying 2012 size?

3. I checked protocol of TPS2511.

    What is mean Divider mode?

4. When I short test of USB lines(VBUS, D+, D-, GND), is there some document about test result?

   Short test condition as below.

  -> +12V to VBUS,   

  -> +12V to D+,   

  -> +12V to D-,   

  -> +12V to GND

Please help for these.

Thanks.

LP5036: Mechanical specs and footprint recommendations.

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Part Number:LP5036

Hi,

We are using LP5036 in one of our new designs. But the datasheet associated with LP5036 doesn't have its mechanical information or footprint recommendations. Can anyone please share them?

Thanks and regards,

UCC28070: 10kW PFC Reference Design

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Part Number:UCC28070

Hi TI experts,

Would you provide 10kW PFC reference design for me? Or I can modify similiar reference design to 10kW and what need to notice when I design it. And I want to know which topology is better to design, analog or digital(UCD3138..) interleave or bridgeless. Please advise, many thanks.

BQ40Z50: Consult some technical questions about BQ40Z50_R2

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Part Number:BQ40Z50

 Dear engineers:
I used BQ40Z50_r2 for a 1S5P Li-battery(18650). The firmware version is <08_build_50.srec>.'Design capacity mAh' was 10000,'Design capacity cWh' was 3700.'Design voltage' was 3700mV.'Dsg current threshold'&'Chg current threshold' were 5000mA. 'DA configuration' was set as 1 series battery.Other parameters were almost default values. I have the following questions:
(1)I used 'CHEM ID' command in 'Commands' list to get chem ID. The result is 0x1210(decimal:4624). I cannot find the ID from your library. Can offer me?
(2)'Max error' and RSOC were all 100%, but ASOC was 0%, RC and FCC were all 0mAh. How to modify?
(3)Cannot charge. CHG MOS was turned on, cell/pin voltage is 3.62V, PACK  connected 4.0V source series with a 1Ohm resistor. How to do?
(4)How to do learning cycle?

(Attachments are pictures of bqStuidio)

 (Please visit the site to view this file)

TL494: MAX collector Current

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Part Number:TL494

Hello team,

regarding the TL494ID PWM CONTROLLER VOLTAGE MODE SOIC16, if I ook into the maximum collector current, do I find the peak max current or average max current?

Can I use the device at absolute max value (collector current) for a prolonged time?

Thank you and best regards,

Adrian

LM5117: LM5117

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Part Number:LM5117

Hi,

I am disabling internal VCC regulator of LM5117 IC by setting VCCDIS pin at 1.5 Volt & connecting external 5 Volt supply to VCC pin. Because I want gate driver voltage of LM5117=5 volt. Will this setting work?I am using LM5117 IC for driving eGAN FET EPC2020 GaNFET switch. This switch require Vgs=5V. can I set VCC pin of LM5117 equals to 5V externally to drive GaNFET.


TPS53659: TPS53659 meet TSNS_LOW fault when normal working condition

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Part Number:TPS53659

Hi team,

My customer is using the TPS53659 now and meet VSNS_Low fault below when switching.

We have checked the TSEN pin 2.2nF cap, the power stage temperature sensed are ok.

i am curious about why the fault happen, and how to improve it?

i have let them test the voltage of the Tsen. Will update later.

Thanks.

LP5569: LP5569

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Part Number:LP5569

How Via I2c we are sending data to SRAM ?

According to Manual ,

1. The compile tool (Lasm.exe) will generate Hex file

2.Then, copy the hex file to the array table

3.upload the data to the SRAM by the below coding.


void load_SRAM()
{
int i,j;
MAP_I2C_setSlaveAddress(EUSCI_B1_BASE,0x40); //Device global setting
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x2F); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x48); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x02); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x54); //send register data
MAP_I2C_setSlaveAddress(EUSCI_B1_BASE, 0x32); //load hex to SRAM in U1
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4b); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x09); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4c); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x78); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4d); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0xa8); //send register data
for(j=0; j<16; j++)
{
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4F); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,j); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE,0x50); //send register address
for(i=0; i<32; i++)
MAP_I2C_masterSendMultiByteNext(EUSCI_B1_BASE,table_32[i+j*32]);//send register data
}
MAP_I2C_setSlaveAddress(EUSCI_B1_BASE, 0x33); //load hex to SRAM in U2
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4b); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x09); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4c); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x7b); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4d); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0xaa); //send register data
for(j=0; j<16; j++)
{
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4F); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,j); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE,0x50); //send register address
for(i=0; i<32; i++)
MAP_I2C_masterSendMultiByteNext(EUSCI_B1_BASE,table_33[i+j*32]);//send register data
}
MAP_I2C_setSlaveAddress(EUSCI_B1_BASE, 0x34); //load hex to SRAM in U3
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4b); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x09); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4c); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x7b); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4d); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0xab); //send register data
for(j=0; j<16; j++)
{
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4F); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,j); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE,0x50); //send register address
for(i=0; i<32; i++)
MAP_I2C_masterSendMultiByteNext(EUSCI_B1_BASE,table_34[i+j*32]);//send register data
}
MAP_I2C_setSlaveAddress(EUSCI_B1_BASE, 0x35); //load hex to SRAM in U5
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4b); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x09); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4c); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x77); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4d); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0xa6); //send register data
References www.ti.com

for(j=0; j<16; j++)
{
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x4F); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,j); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE,0x50); //send register address
for(i=0; i<32; i++)
MAP_I2C_masterSendMultiByteNext(EUSCI_B1_BASE,table_35[i+j*32]);//send register data;
}
MAP_I2C_setSlaveAddress(EUSCI_B1_BASE, 0x32); //SET U1 as the clk out
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x2F); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x49); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x3d); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x08); //send register data
MAP_I2C_setSlaveAddress(EUSCI_B1_BASE, 0x40); //Run all the engine
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x02); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0x00); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x02); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0xa8); //send register data
MAP_I2C_masterSendMultiByteStart(EUSCI_B1_BASE, 0x01); //send register address
MAP_I2C_masterSendMultiByteFinish(EUSCI_B1_BASE,0xa8); //send register data
}

What address we are using to pass the data Patterns to SRAM ?

UCC27532: UCC27532 failure issue

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Part Number:UCC27532

Hi Team,

My customer is using UCC27532 in some projects. Now they are doing pp in field but they found some failure in field side. So we now want to check if these is something wrong with the schematic, would you pls help check if the schematic as below has some potential issue? Many thanks for the suggestion.

The isolated driver they used, datasheet showed as below:

(Please visit the site to view this file)

Best regards,

Sulyn

TPS92513: LED current output higher than designed

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Part Number:TPS92513

We have designed a buck converter circuit using TPS92513 chip (find below the schematic). Circuit is designed for input range of 10.2V to 14.5V and output voltage of 5.6V to 6.6V and 80mA LED current output. However when we measure the output current it is around 110mA. output voltage range is within the range expected. We are measuring Iadj voltage as 1.74V and Isense voltage of 0.402V.

While testing we accidentally found that when main power supply is ON and when we disconnect the load and connect it back, output current comes down to 80mA. at this instant iadj voltage is 1.74V and isense voltage is 0.302V. But when we power recycle, the output current is again 110mA.

Please let us know what could be the issue.

BQ27Z561: Programming specification request

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Part Number:BQ27Z561

Hello,

Our customer asked us to implement the mass programming of Code Flash Memory and Data Flash Memory of the BQ27Z561. So I would like to ask you provide the programming specification for Flash memories to us.

Thank you in advance.

Best regards,

Frantisek

BQ40Z80: Cell 7 Voltage not accuracy

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Part Number:BQ40Z80

Hi,

     I'm using v0.04 firmware and using Keithley 6 1/2 multimeter to calibrate voltage . After calibration, vc1-vc6 accuracy is about 1mv but vc7 is 5-10mV.

How can I improve vc7 accuracy. I had tried to short  vc7 voltage divde mosfet between drian and source, and putting one 1nF cap on pin VC7SENSE but no effect.

Thanks.

Jeff Chen

TPS53317: hiccup waiting time

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Part Number:TPS53317

Hi,

Please let me ask about the hiccup waiting time that is described in UVP section, because I can't find it in electrical characteristics.

Best Regards,

Satoshi


[FAQ] UCC27282: Gate driver IC prevents damage from negative voltage spikes due to stray layout inductance and protects against cross conduction with built-in interlock in 100V half-bridge applications

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Part Number:UCC27282

Advanced power supply designers often face challenges when designing robust, high density, and high efficiency power supplies. To achieve these, they often ask for gate driver ICs that are as small as possible, but at the same time have excellent switching characteristics such as fast rise/fall times, small propagation delay, and excellent delay matching. Most of these designs need to operate at very high switching frequencies and to reduce switching losses, designers ask for a gate driver that can satisfactorily operate at low supply voltages. These power supplies need to operate in noisy (electrical) environments and therefore need features such as negative voltage handling and overlap protection. Most of the time low standby current is a must-have requirement and a driver IC needs to be disabled in such operating modes. Power supply designers also ask for a driver that can be disabled if a system level fault exists.

Texas Instruments recently released a 100V half-bridge driver to accommodate and address all these requirements from power supply design engineers.

The key features of the UCC27282 are:

  • Drives Two N-Channel MOSFETs in High-Side Low-Side Configuration

  • 5-V Typical Under Voltage Lockout

  • Interlock/Overlap Protection

  • Enable/Disable Functionality

  • 16-ns Typical Propagation Delay

  • 12-ns Rise, 10-ns Typical Fall Time With 1800-pF Load

  • 1-ns Typical Delay Matching

  • Absolute Maximum Negative Voltage Handling on Inputs (–5 V)

  • Absolute Maximum Negative Voltage Handling on HS (–14 V)

  • 3.5-A Sink, 2.5-A Source Output Currents

  • Absolute Maximum Boot Voltage 120 V

  • Low Quiescent Current (7-µA) when Disabled

  • Integrated Bootstrap Diode

  • SON-10 DFN 3x3mm Package

  • Specified from –40°C to 140°C Junction Temperature

 

Key benefits of UCC27282 are:

  • Compact package allows for use in high power density and low loss applications

  • 5V UVLO allows low bias voltage operation to optimize design at different operating modes in high efficiency applications

  • Small propagation delay and delay matching allows for the use in high frequency and high efficiency applications

  • Interlock protects against shoot-through current in the half bridge configuration and negative voltage handling allows for use in harsh environments and improves system robustness

  • Enable/disable functionality allows low quiescent current mode and greater system flexibility in fault conditions

 

Above mentioned features and benefits make UCC27282 an ideal candidate for following applications:

  • Telecom and Merchant Power Supplies

  • Motor Drives and Power Tools

  • Auxiliary Inverters

  • Half-Bridge and Full-Bridge Converters

  • Active-Clamp Forward Converters

  • High Voltage Synchronous-Buck Converters

  • Class-D Audio Amplifiers

 

Do you have any questions on how to implement UCC27282 in your design? If you have any questions, comments, or concerns please post to E2E so the team can help address your needs.

 

For additional information or if you would like to order samples please follow the respective links:

The Datasheet is available here: http://www.ti.com/lit/ds/symlink/ucc27282.pdf

Samples are available to order here: http://www.ti.com/product/UCC27282/samplebuy

low noise boost switcher

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I need to simple boost switcher, but low noise for ADC application. 

boost from 5v to 6.5V, current 1A. 

I am using LMR64010, but the noise is high, would you please recommend one with lower noise. 

TPS610981: Startup Latch-Up with Vin Current Limit

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Part Number:TPS610981

I have the following (simple) setup:

- TPS610981EVM-674 Rev.A Evaluation Module
- 100 Ohms resistor at the Output between J4/Vmain and J8/GND
- JP1 Low
- Bench Power Supply (SUP) with V_sup = 3V between J1/Vin and J3/GND

If I setup the current limit of my Bench Power Supply to e.g. I_sup_max = 30mA and then connect the EVM, the TPS610981 seems to permanently short V_sup to ~0.73V. If I then increase the current limit to e.g. I_sup_max = 100mA, the short circuit stays(!!!) Until I further increase the current limit to approximately I_sup_max = 140mA, the permanent short disappears and V_sup return to 3V normal.

It seems that when the supply has high output resistance (at first), the TPS610981 falls into a short circuit mode from which it is not possible to recover easily (at least not with a battery with relatively high output resistance).

So my questions:

1) What happens here?
2) Why do I need ~140mA to recover from this startup condition?
3) How can I prevent this from happening? (Assuming that my supply has a relatively high output resistance at first and I can not change this).

Thanks for your support,
Stefan

BQ76PL455A: TIDA-0817 for 800V and 15KWh(continuous current) battery pack

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Part Number:BQ76PL455A

Hi Sir,

     We are automotive startup and building high performance electric motorcycle. For electrical side we want Active balancing for our Battery pack. I think as per current scenario no one is using that, they uses passive balancing. So my 1st query is if active balancing is feasible for 15KWh pack? for this pack 30A continuous current and peak current 60A for 10 sec and 100A impulse. We want your support for finding proper solution.

I was looking for TIDA-0817 for 1st prototype. In 1st step we are thinking to build 615Wh battery pack with TIDA-0817. We have 16S4P cell structure. So is it possible with 1 TIDA-0817?

What would you recommend to use your BMS for our application?

BQ40Z50-R1: In-correct FCC

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Part Number:BQ40Z50-R1

Hi,

We have a battery using BQ40Z50-R1 installed in our system for over 6 months, but the battery has never gone thru a complete charge/discharge cycle (Cycle count = 0) since our system operates with AC plugged in.

The FCC/RMC dropped to 3482mAh (design capacity is about 8100mAh), and so we have battery fault alarm since our system check the FCC for valid range of 6000mAh - 10000 mAh.

I removed the battery from the system and set it on the table, and starts logging the information with just  EV2300/BQStudio. The FCC recovered to about 7800mAh after about 5 hours (according to the log information).

I notice that before the battery recovered, the BatteryStatus(DSG) bit is 0, the ITStatus(REST) is also 0. The T_ambient is -296.5C. Max Error = 101%. T_sim = 24.2C

When the battery recovered,  the BatteryStatus(DSG) bit is 1, the ITStatus(REST) is also 1. The T_ambient is 18.6C. Max Error = 101%. T_sim = 17.9C

Please note that this battery still have Max Simulation Iterations set at 50, not 30. The battery was also not seal.

Please see attached files.

Thank you,

Phuoc

(Please visit the site to view this file)

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