Part Number:TPS22976
Hi team,
Could you please comment on the reliability concern that TPS22976 always operates at fast ON/OFF condition? Thanks!
Customer uses ON1/ON2 pins for ON/OFF control and the frequency is in the range of 100Hz to 1KHz. Engineers worry the operation hurts the device reliability.
Best regards,
Sam Ting
Dear friends,
I have just read SLVA381B document from TI. This document explains the effect of Phase margin in Load transient. Finally in the document Load-Step Response of TPS5430 is given in Figure 8.
I have some doubts regarding this
1. What is the Load change rate(in A/uS) for the TPS5430 example?
2. What is the frequency of Load change in TPS5430 example?
3. What percentage of switching frequency need to keep as the frequency frequency of Load change, when we are co-relating the load transient waveform with phase margin?
for example if my converter switching frequencies are 100KHz, 500KHz and 1MHz what should be the respective frequency of Load change while doing the load transient test?
Regards
Aneesh
Part Number:LP8860-Q1
Hi,
Could you please share the LP8860 design file(.PcbDoc), thank you.
Warm Regards,
Kevin Lin
Part Number:BQ78350-R1
Hi all,
I would like to have a question about logging of BQ78350.
We have a battery 10s6p with BQ78350, which I log with Battery Studio.
Discharge current is not extremly high : 17-12A
I have made several cycles and logged all registers.
Sometimes the battery voltage is an unusual value. Not always.
The registers do not change while this undervoltage is measured. The cells have a normal voltage value. This is a failure from Studio??
The resolution of "Watch" is 2000ms , so I measured this value just once.
Could you please me explain what is this?
Please see the atteched files.
Best regards
Adam
Part Number:BQ24073
Hi, TI team.
My customer will design battery charger for 2600mA battery.
BQ24073 can set current limit by 1.5A.
Test condition
DC power supply : 5V, 500mA
BQ24073EVM : charging current 1A. (external setting)
Result : DC power supply voltage dropped to 4.4V.
When the charging current limit of BQ24073 is set to 1A, If user will use 500mA DC adapter, Is DC adapter possible to be damaged?
Part Number:BQ40Z50-R2
Hi,
I'm currently designing a smart battery management system for a 9Ah battery pack containing 3 li-ion cells connected in series. I have to use charge enable(CE) and cell balancing for this design. The BQ20z655-R1 IC meets most of the design requirements. But if it is possible, I would like to use BQ40z50-R2 . Because I know TI experts generally recommend a newer gauge like bq40z50-R2
1. Charge Enable
I couldn't find CE(Charge Enable) pin on bq40z50-r2 . Is there any way to use CE(charge enable) with bq40z50-r2 like Bq20z655-R1 ? If it is possible, I would like to add CE(charge enable) function to my design. I'm considering, maybe external MCU can help for that. For example, I can communicate with IC by SMBus for controlling to charge/discharge MOSFET. Does this method cause problems in the algorithm of IC? Is there any other method you suggest? The only thing I want to do is not allow the charge without external supply. Activation current is approximately 5-10 mA for my design.
2. Cell Balancing
As my first question, BQ20z655-R1 IC meets most of the design requirements. But I want to know difference between bq40z50-r2 and bq20z655-r1.
Bq20z655-r1 for Charge Control Features:
"Determines the chemical state of charge of each battery cell using Impedance Track™ and can reduce the charge difference of the battery cells in fully charged state of the battery pack gradually using cell balancing algorithm during charging. This prevents fully charged cells from overcharging and causing excessive degradation and also increases the usable pack energy by preventing premature charge termination"
Bq40z50-r2 for Charge Control Features:
"Reduces the charge difference of the battery cells in a fully charged state of the battery pack gradually using a voltage-based cell balancing algorithm during charging. A voltage threshold can be set up for cell balancing to be active. This prevents fully charged cells from overcharging and causing excessive degradation and also increases the usable pack energy by preventing premature charge termination."
As mentioned above, bq20z655-r1 using Impedance Track algorithm , bq40z50-r2 using voltage-based cell balancing algorithm for "Charge Control Features". But as mentioned in datasheets of Bq20z655-r1 and bq40z50-r2, the same algorithm(Impedance Track algorithm) is used in the gas gauging section.
I'm considering, which one is better? Could you please provide me differences, advantages and disadvantages, between these ICs for this topic. Please note that, based on the datasheet of Bq40z50-r2 (page 24) voltage-based and impedance track algorithms are using.
3. LCD Support
Finally, If it possible, I would like to use LCD with bq40z50-r2 . Is there any way for that such as using MCU. I'm considering, maybe I can use MCU for communicate with IC by SMBus for control to charge/discharge MOSFET's.
Thank you.
Part Number:BQ27426
Hi TI support members.
I measeured the relationship between Resaeve Capacity, Remaining Capacity and Terminate Voltage (Refer to attachde file).
I tought the relationship are as the table 1.
But following mesurement result weren't as I thought (Terminate voltage and RC = 0% are the same point).
Please tell me if there is something wrong with my thinking.
Best regards,
Chiaki Endo
Attached file (Please visit the site to view this file)
Part Number:BQ40Z50-R1
Hi,
I noticed that the default OCC Recovery Threshold is -200mA, implying that a load must be attached to the pack to bring the gauge out of fault.
What if the battery is empty when this occurs - wouldn't it become "bricked"?
Thank you,
Jeremy.
Part Number:TPS53659
Dear Expert,
We want to validate our SVID quality and we need to know the "voltage definitions" on VR chip side.
Could we follow "4.11 Login interface Pins" specification like "Falling/Rising slew rate SDIO"?
(But our test result(0.3~0.7V/ns) is lower than these spec.....)
These 4.11 spec seem the same as Intel doc 544905 "Table 3-2" guideline, but Intel has a note "The slew rate is defined with VR buffer capacitance only. Slew rate is not a critical validation parameter but used
for the CPU and PWM vendor to design the output buffer".
So these criteria seem don't suitable for our board level validation.
Please suggest which SVID voltage criteria should we follow? thank you.
Part Number:LP3985
At a review of my design a collegue complained, that with the minimum input voltage of 4,4V the 5V-LDO will not work, as the datasheet sais:
'7.4.1 Operation with VOUT(TARGET) 0.3 V ≤ VIN ≤ 6 V
The device operates if the input voltage is equal to, or exceeds, VOUT(TARGET) +0.3 V. At input voltages below the minimum VIN requirement, the devices does not operate correctly, and output voltage may not reach target value.'
The minimum VIN requirement is: 'Recommended minimum VIN is the greater of 2.5-V or VOUT(MAX) + rated dropout voltage (max) for operating load current.'
So in my case the minimum VIN is 5V+3%+ 35mV=5,185V to be shure that the device will operate correct!
Unclear: is the LDO output MOSFET conducting if the device is below Vinmin?
We fear that the LDO will not work at all!
Unfortunately there is no figure showing the behaviour of output voltage with increasing input voltage.
Is the behaviour of this LDO different from other LDOs so that TI is forced to mention this?
In the datasheet of an other LDO from TI (TLV713) this theme is described as follows:
'8.1.2 Dropout Voltage
The TLV713 uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout
voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the
RDS(on) of the PMOS pass element. VDO scales...
Has anybody experience with this LDO?
Part Number:UCC28051
Hello,
Regarding to UCC28051D, my customer is asking some question.
(1)According to datasheet, ULVO is 12.5V(typ). But some characteristics data is at Vcc=12V.
(Below (Figure 15/16))
In this case, how should we interpret about it? Could you please explain about it?
(2) They will design two conditions as following.
･AC/DC input:AC100－AC264V output:DC390V
･DC/DC input:DC100V output:DC390V
Can UCC28051D support AC and DC input?
Regards,
Tao 2199
HI
We got a question about TPS23753A.Could you help us?
[Question]
As we know,POE Hardware classification allows a PSE to determine the power requirements of a PD before starting, and helps
with power management once power is applied.In TPS23753A，We populate the CLS pin with 90.9 ohms resistor，and founded that
it's still working while the load of PD is not reached 6.49W.Is that right?In my submission,when use CLASS 3,the load of PD
must between 6.49W and 12.95W.otherwise,it wouldn't work.
Best Regards,
Part Number:TPS61021A
My customer have some problem with TPS61021A.
Their spec is input 0.9V~2.7V.
Output is 4V@0.5A.
No load
When input is 0.9 V, Vref is 240mV and output voltage is 1.0V
When input is 1.1 V, Vref is 360mV and output voltage is 1.6V
When input is 1.3 V, Vref is 440mV and output voltage is 1.8V.
When input is 1.5 V, Vref is 560mV and output voltage is 3.2V.
When input is 1.8 V, Vref is 800mV~900mV and output voltage is 4.1V~4.2V
under 1.8V, Vref is unstable and out voltage is untable.
How do I fix this issue?
Part Number:BQ24210
I plan to charge the battery of my IoT device with the BQ24210.
The charger will be permanently connected to the Li Ion battery (18650 1cell, 3200 mAh)
Solar panel will be : Voc = 6V, Vmp = 4.4V, Imp = 500-750mAh
EN tied to PG (no LOAD mode)
Riset 780 Ohm
Rchg=Rpg=2K Ohm
Vdpm will float , unconnected
I wonder, in order to extend the life of the battery, is it possible, after the completion of the charging, to set up some how IC to wait for the battery voltage to decrease lets say to 3.5V in order to reactivate the recharge process again ?
Part Number:TPS25200
Hi team,
I want to confirm that the TPS25200 is not damaged under the following conditions.
Condition
FAULT# pin is forced 0V by another devices.
6pin IN : 0V or 3.3V or 5V
4pin EN : 0V or 3.3V
*Not required over current detection about these conditions.
My understanding is TPS25200 does not damaged, because FAULT# is open drain.
Regards,
Ogasawara
Part Number:LM3409HV
Hi,
We want to use IADJ pin of LM3409HV, to control the LED current as a function of externally applied control voltage. We are planning to drive this IADJ pin from a voltage source of 0V - 4V. Does the IADJ pin reference of 1.24V, has zener diode or precision linear regulator? If only zener is there, what is the biasing current range?
We couldn't find the voltage rating of this pin from datasheet. What is the maximum allowed voltage of ADJ pin?
If the external voltage applied to IADJ pin is below 1.24V, will the internal reference be overridden by external voltage reference?
Warm Regards,
Ambar
Part Number:BQ76PL455A-Q1
Dear Sir,
I am working on BQ76PL455A-Q1 for EV BMS application. In the circuit 2 IC's of BQ76PL455A-Q1 are used.
First i checked with BQSTUDIO GUI :--> Both the IC's got detected and I could read all the voltages.
Now when I use microcontroller for programming the same, I am able to read Bottom device but unable to read the Top device.
Texas API are used for programming (As per Example code)
Please verify my attached code below.
void WakePL455(void)
{
#ifdef CONF_BQ76PL455
// Wake all devices
// The wake tone will awaken any device that is already in shutdown and the pwrdown will shutdown any device
// that is already awake. The least number of times to sequence wake and pwrdown will be half the number of
// boards to cover the worst case combination of boards already awake or shutdown.
// toggle wake signal
ioport_set_pin_level(Wakeup, false);
delay_ms(5);
ioport_set_pin_level(Wakeup, true);
delay_ms(5);
ioport_set_pin_level(Wakeup, false);
#endif
}
void auto_address()
{
/*
Summary of Steps for Auto-Addressing
1. Make sure all boards are awake and ready to receive the AUTO-ADDRESS ENABLE command.
2. Turn on the downstream communications drivers on all devices in the chain.
3. Place all devices into auto-address learn mode.
4. Send out new addresses to all possible bq76PL455A-Q1 device addresses, in incremental order,
starting at 0.
5. Read back the value stored in the Device Address register from each newly addressed device, starting
at address 0 and proceeding sequentially. The last bq76PL455A-Q1 device to successfully respond is
the last device in the serial chain.
6. Turn off the high-side communications receiver on the last (top-most) device in the chain.
7. Turn off the single-ended transmitter on all except the lowest device in the chain.
*/
// set communications baud rate as 250KBaud
nDev_ID = 0;
nSent = WriteReg(nDev_ID, COMCONFIG, 0x10E0, 2, FRMWRT_ALL_NR);
// Address will be set using Auto Addressing.
// Comparator hysteresis is disabled.
// Over voltage (OV) and under voltage (UV) comparators are enabled.
// Internal regulator (NPN drive for VP/VDIG) is enabled. This is the normal operating mode.
// Faults are unlatched and clear automatically,
nSent = WriteReg(nDev_ID, DEVCONFIG, 0x10, 1, FRMWRT_ALL_NR);
// Auto Address enable
nSent = WriteReg(nDev_ID, DEV_CTRL, 0x08, 1, FRMWRT_ALL_NR);
// Set addresses for all boards in daisy-chain (section 1.2.3)
for (nDev_ID = 0; nDev_ID < TOTALBOARDS; nDev_ID++)
{
nSent = WriteReg(nDev_ID, ADDR, nDev_ID, 1, FRMWRT_ALL_NR); // send address to each board
}
// enable only comm-low for the top board
nDev_ID = 1;
nSent = WriteReg(nDev_ID, COMCONFIG, 0x1020, 2, FRMWRT_SGL_NR);
// enable comm-high, single-end comm port on bottom board
nDev_ID = 0;
nSent = WriteReg(nDev_ID, COMCONFIG, 0x10C0, 2, FRMWRT_SGL_NR);
// clear all fault summary flags
nDev_ID = 1;
nSent = WriteReg(0, FAULT_SUM, 0xFFC0, 2, FRMWRT_SGL_NR);
nDev_ID = 0;
nSent = WriteReg(0, FAULT_SUM, 0xFFC0, 2, FRMWRT_SGL_NR);
}
void configure_AFE(void)
{
nDev_ID = 1;
nSent = WriteReg(nDev_ID, SMPL_DLY1, 0x00, 1, FRMWRT_SGL_NR); // initial sampling delay
nSent = WriteReg(nDev_ID, CELL_SPER, 0xBC, 1, FRMWRT_SGL_NR); // voltage and Temp sampling interval 12.6us
//nSent = WriteReg(nDev_ID, AUX_SPER, 0x44444444, 4, FRMWRT_SGL_NR); // initial sampling delay
nSent = WriteReg(nDev_ID, OVERSMPL, 0x00, 1, FRMWRT_SGL_NR); // Oversampling rate and command
nSent = WriteReg(nDev_ID, DEV_STATUS, 0x38, 1, FRMWRT_SGL_NR); // clear fault flags in the system status register
nSent = WriteReg(nDev_ID, FAULT_SUM, 0xFFC0, 2, FRMWRT_SGL_NR); // clear all fault summary flags
nSent = WriteReg(nDev_ID, NCHAN, 0x0D, 1, FRMWRT_SGL_NR); // NCHAN : set number of cells to 13
nSent = WriteReg(nDev_ID, CHANNELS, 0x1FFF0000, 4, FRMWRT_SGL_NR); // select all 14 cell, AUX channels 6 AND 8, and internal digital die and internal analog die temperatures
nDev_ID = 0;
nSent = WriteReg(nDev_ID, SMPL_DLY1, 0x00, 1, FRMWRT_SGL_NR); // initial sampling delay
nSent = WriteReg(nDev_ID, CELL_SPER, 0x44, 1, FRMWRT_SGL_NR); // voltage and Temp sampling interval 12.6us
nSent = WriteReg(nDev_ID, AUX_SPER, 0x44444444, 4, FRMWRT_SGL_NR); // initial sampling delay
nSent = WriteReg(nDev_ID, OVERSMPL, 0x00, 1, FRMWRT_SGL_NR); // Oversampling rate and command
nSent = WriteReg(nDev_ID, DEV_STATUS, 0x38, 1, FRMWRT_SGL_NR); // clear fault flags in the system status register
nSent = WriteReg(nDev_ID, FAULT_SUM, 0xFFC0, 2, FRMWRT_SGL_NR); // clear all fault summary flags
nSent = WriteReg(nDev_ID, NCHAN, 0x0E, 1, FRMWRT_SGL_NR); // NCHAN : set number of cells to 14
nSent = WriteReg(nDev_ID, CHANNELS, 0x3FFF0000, 4, FRMWRT_SGL_NR); // select all 14 cell, AUX channels 6 AND 8, and internal digital die and internal analog die temperatures
Voltage_threshold(); // Cell OV,UV,Comp_OV, Comp_UV voltage threshold setting
Thermistor_threshold(); // Auxiliary thermistors Upper and Lower limit threshold setting
}
void Voltage_threshold(void)
{
uint16_t OV_thresh, UV_thresh;
uint8_t OVC_thresh, UVC_thresh;
Volt_th(OV_th, UV_th, &OV_thresh, &UV_thresh);
Comp_volt_th(COV_th, CUV_th, &OVC_thresh, &UVC_thresh);
nDev_ID = 0;
nSent = WriteReg(nDev_ID, CELL_OV, OV_thresh, 2, FRMWRT_ALL_NR); // Cell overvoltage threshold
nSent = WriteReg(nDev_ID, CELL_UV, UV_thresh, 2, FRMWRT_ALL_NR); // Cell undervoltage threshold
nSent = WriteReg(nDev_ID, COMP_OV, OVC_thresh, 1, FRMWRT_ALL_NR); // Cell comparator overvoltage threshold
nSent = WriteReg(nDev_ID, COMP_UV, UVC_thresh, 1, FRMWRT_ALL_NR); // Cell comparator undervoltage threshold
}
void Thermistor_threshold(void)
{
uint32_t UT_thresh, OT_thresh;
Temperature_th(UT_th, OT_th, &UT_thresh, &OT_thresh);
nDev_ID = 0;
nSent = WriteReg(nDev_ID, AUX0_UV, UT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 0 undervoltage threshold
nSent = WriteReg(nDev_ID, AUX0_OV, OT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 0 overvoltage threshold
nSent = WriteReg(nDev_ID, AUX1_UV, UT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 1 undervoltage threshold
nSent = WriteReg(nDev_ID, AUX1_OV, OT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 1 overvoltage threshold
nSent = WriteReg(nDev_ID, AUX2_UV, UT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 2 undervoltage threshold
nSent = WriteReg(nDev_ID, AUX2_OV, OT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 2 overvoltage threshold
nSent = WriteReg(nDev_ID, AUX3_UV, UT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 3 undervoltage threshold
nSent = WriteReg(nDev_ID, AUX3_OV, OT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 3 overvoltage threshold
nSent = WriteReg(nDev_ID, AUX4_UV, UT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 4 undervoltage threshold
nSent = WriteReg(nDev_ID, AUX4_OV, OT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 4 overvoltage threshold
nSent = WriteReg(nDev_ID, AUX5_UV, UT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 5 undervoltage threshold
nSent = WriteReg(nDev_ID, AUX5_OV, OT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 5 overvoltage threshold
nSent = WriteReg(nDev_ID, AUX6_UV, UT_thresh, 2, FRMWRT_ALL_NR); // Auxiliary 6 undervoltage threshold
nSent = WriteReg(nDev_ID, AUX6_OV, OT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 6 overvoltage threshold
nSent = WriteReg(nDev_ID, AUX7_UV, UT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 7 undervoltage threshold
nSent = WriteReg(nDev_ID, AUX7_OV, OT_thresh, 2, FRMWRT_ALL_NR); // Auxillary 7 overvoltage threshold
}
void power_config(void)
{
/*
AFE_PCTL = 1 It is strongly recommended this bit be set to 1.
Cell voltage sampling will be delayed by 100 µs every time sampling is requested, regardless of whether
or not the AFE was already powered up. This provides time for the AFE to power up and ensures that
the sampling synchronization is maintained between multiple devices.
Changes to this register may not take effect until after the next AFE sample is taken
RSVD = 0000000
BYTE = 10000000 BINARY = 0X80 HEX
*/
nDev_ID = 0;
nSent = WriteReg(nDev_ID, PWRCONFIG, 0x80, 1, FRMWRT_ALL_NR); // standard configuration as per data sheet
}
void bq76pl455_init(void)
{
auto_address();
power_config(); // Power configuration as per data sheet
configure_AFE();
}
void readvoltage(void)
{
// Send request to All boards to sample and store results
nDev_ID = 0;
nSent = WriteReg(nDev_ID, CMD, 0x00, 1, FRMWRT_ALL_NR); // send sync sample and store command
delay_us(2800); // still need to wait for sampling to complete
// Read stored sample data from boards
nDev_ID = 1;
nSent = WriteReg(nDev_ID, CMD, 0x20, 1, FRMWRT_SGL_R); // send read stored values command
// Read stored sample data from boards
nDev_ID = 0;
nSent = WriteReg(nDev_ID, CMD, 0x20, 1, FRMWRT_SGL_R); // send read stored values command
}
int main (void)
{
/* Insert application code here, after the board has been initialized. */
initialization();
/* Insert system clock initialization code here (sysclk_init()). */
module_test();
readvoltage();
while(1)
{
counter();
}
} UART is Interrupt based.
Thanks
Ritul Shah