Hello,
Looking at the BQ76930EVM, (Page45) I have a question.
I understand that the VC lines switch between measuring the voltage (presumably presenting a high impedance input to the external balancing circuit) to actively balance adjacent circuits. I understand that the internal circuit can balance up to 5mA between VC lines, but what does the output stage of a VC line look like when in balancing mode and how does it affect the external balancing circuit in EVM?
Thanks.