Hello,
I am hoping to get some clarification on the various short circuit and over-current timing mechanisms on the bq78350 + bq769x0 battery management system.
We're relying on the short-circuit protection to slowly charge up a large capacitive load at our battery output. The idea is you enable the FETs and the bq circuit uses the short-circuit limiting and the latch settings to allow set pulses of energy through to the capacitors. Once the capacitors are charged, the FETs should remain on.
We have all of this working, but where we're getting hung up is the time between pulses. We think that we are setting everything to the minimum retry time, but we're seeing a very consistent 5s wait time between pulses. Below is a screenshot of the output voltage on our capacitive load.
In this case, we've bypassed both ASCD and AOLD bits by setting them to zero and disabled the OCD, which from the technical reference guide seems like it should limit the recovery time between pulses to within 250ms. In summary, the protection bits are:
ASCDL (Bit 7) = 0 - Disabled
ASCD (Bit 6) = 0 - Bypassed, auto recovers within 250 ms
AOLDL (Bit 5) = 0 - Disabled
AOLD (Bit 4) = 0 - Bypassed, auto recovers within 250 ms
OCD (Bit 3) = 0 - Disabled
OCC (Bit 2) = 0 - Disabled
COV (Bit 1) = 0 - Disabled
CUV (Bit 0) = 0 - Disabled
Any insight you could provide would be much appreciated!
Thanks, Jess