Part Number:BQ76200
Hi,
We have prepared a power path circuitry for a battery management system using the bq76200PWR. Schematic follows below:
![]()
Complaints with Turn-on
The turn on characteristics when C122 = 0.1uF:
CH1: TP53 - TP10
CH2: TP69 - GND
![]()
The turn on characteristics when C122 is removed, the voltage dip on TP169 has increased:
CH1: TP53 - TP10
CH2: TP69 - GND
![]()
The turn on characteristics when R116 is removed, the Vgs has an acceptable rise time. What is the limitation of that causes this slow turn on to happen when the FETs come into picture? I have also tried increasing C122 to 2.2uF, with no improvement in the turn on time.
CH1: TP53 - TP10
CH2: TP69 - GND
![]()
Complaints with Turn-off
A similar issue is observed with the turn off of the FETs. It is seen that the turn off is not rapid. (Tfall < 500 ns). Based on the documentation, it is to be noted that the turn-off time is dependent on the value of R108 and C100. Tuning this value to R=10 ohm, C = 0.01uF does not change the turn off time either.
![]()
Because of this, the FETs are not able to sustain a direct short at the battery pack level, and are failing due to SOA breach. Can you provide recommendations to:
1. Reduce tf (Fall time) while turn off
2. Have a cleaner turn off without artifacts (Reduced rise time)
Thanks