Part Number:TPS786
TPS78601DCQR states in the datasheet that the Lead/Ball Finish is CU SN. Every other part that is offered in the DCQ package on the datasheet comes in CU NIPDAU finish. Is this a typo in the datasheet or is this the only part that comes with a different finish? What letter denotes the CU SN finish in the part number? Thanks.
Part Number:TPS43351-Q1
Dear TI, (but likely Gordon),
In the same circuit used in my previous post, I have two TPS43351-Q1's. One is the master, with its SYNC pin connected to its VREG pin so that it's always in CCM. The Channel 2 low side gate drive output of the Master, pin GB2, is connected to the SYNC pin of the second TPS43351-Q1. They both operate, but their switching frequencies are not synchronized. I have footprints for an R-C low pass filter between GB2 of the Master and SYNC of the slave, but the GB2 waveform is quite clean. The Master has spread spectrum enabled. Could this be preventing the Slave's PLL from locking? I connected a 50% square wave with levels of 0 to 5V at 350 kHz to the Slave's SYNC pin and that worked perfectly. A second thing II'm wondering is whether the SYNC pin needs a 50% square wave - the GB2 output of the Master s not a 50% duty cycle.
Ch.1 = SW1 of Master, Ch.3 = GB2 pin of master and SYNC pin of slave, Ch.4 = SW1 of Slave
This plot shows that the rising edge of GB2/SYNC is not aligned with SW1 of the Slave, whereas they are aligned when the Slave is sync'd to a signal generator.
Thanks,
Chris
Part Number:LM5160
hi customer design requirement
3W
1.
Vin=12V~24V(Linear mode)
Vout=5V(isolate)
2.
Vin=12V~24V(Linear mode)
Vout=3.3V(isolate)
3.
Vin=12V~24V(Linear mode)
Vout=±15V(isolate)
is LM5160 a suitable solution?
which one of the EVM is better for testing?
LM5160DNTBKEVM Wide Input 65V, 1.5A Synchronous Step-Down DC-DC Converter
http://www.ti.com/tool/LM5160DNTBKEVM?keyMatch=lm5160&tisearch=Search-EN-Everything
LM5160DNTFBKEVM Fly-Buck Isolated Bias Supply Evaluation Board
http://www.ti.com/tool/LM5160DNTFBKEVM?keyMatch=lm5160&tisearch=Search-EN-Everything
Part Number:BQ27Z561
Hi,
My customer's battery pack could connect to bqstudio by ev2400 but could'nt by ev2300.
The ev2300 i2c had be pull-up to 3.3v by a 4.7k resistor and connect to bq27541 is well,
but can't connect to bq27z561. It's weird because I think EV2300 clock frequency is lower then ev2400.
Bellow is the schematic.
Thanks
Part Number:BQEVSW
Hi everyone,
I have had my IT department load the TI bq evaluation software on my computer and when I try to run the program I get an error stating "Failed to load TiGrid from the TiGrid.ocx. Your version of TiGrid.ocx may be out of date. I have checked the file from a computer that has the software that actually works and it is the same file with the same date when it was last modified. My IT department has never seen this error either. Any help would be great. I am running version 0.9.90.
Part Number:UCC28064
Please let me know about critical advantage in the case of low standby power for UCC28064.
About application note slua879 Figure 1~3;
①Customer think that most low power consumption for standby condition is PFC shut off because not needed boost to 400V.
Is this idea correct? I want to understand why UCC28064 using on the stand by (low power) condition. (The reason for advantage better than PFC shut off)
②About Figure 1 "AUX Flyback For Standby", I think that more effective is AUX winding from LLC transformer.
Why use Flyback? Is there compare efficiency data for Flyback and AUX winding?
Best regards,
Satoshi
Part Number:TLC59581
Hi,
I am using TI TLC59581 LED driver but I am confused about the operation of the ES-PWM in this device. This device has a 16-bit Grayscale control so 65536 GCLK pulses are needed. In the 8+8 ES-PWM mode, the total number of GCLK pulses is divided into 256 segments (in the 7+9 mode, these are 512 segments). The TLC59581 application note mentions that each segment contains 256 x 32 GCLK pulses in the static driver case and 257 x 32 X 256 GCLK pulses when 32 multiplexing is used (one sub-period with 32 segments). The timing diagram of this case is shown in Fig. 15. For the 7+9 ES-PWM, the application note describes that each segment is divided into 512 segments and each segment has 129 GCLK pulses in the static driver case and 129 x 32 x 512 GCLK pulses when 32 multiplexing is used (one sub-period with 32 segments). The timing diagram of this case is shown in Fig. 17.
Questions:
1. Why do you use 257 x 32 GCLK pulses in each segment (129 x 32 GCLK pulses for the 7+9 mode) and not 256 x 32 GCLK pulses? Please, note that 257 x 32 x 256 is higher than the total number of GS pulses (=65536). This is also the case for the 7+9 mode: 129 x 32 x 512>65536.
2. Why there is a difference for the static driver case for the 8+8 ES-PWM mode (256 GCLK pulses per segment) and the 7+9 ES-PWM mode (129 GCLK pulses per segment)?
Another question is about the LED open detection (LOD) function. When exactly the LOD is monitored? Does this happen in each segment?
Thank you for your feedback.
Kind regards,
Kasia
Part Number:BQ25898
Hi,
In the page 6 of datasheet, it recommend to use 10V rating capacitor on REGN, but then can you accept to use 6.3V rating capacitor if there system will operate witn only 5V input?
Best Regards,
Satoshi / Japan DIsty
Part Number:TPS63070
HI
I am using TPS63070 buck-boost regulator and I would like to get 4.7V output at TP12 but I am getting 11.5v which is wrong and don't know why. (Input voltage is around 5.8v, but could vary between 4.7 -6.5)
Base on the Datasheet R1=R2(Vo/Vref-1) => R1=34k(4.7/0.8-1)=> R1=165K ,R2=34K
Could someone let me know why? 5.8v => FB = 1.9 => Vreg=> 11.5
Inductor MLF2012DR33KT000
Part Number:BQ30Z554-R1
Hi,
My customer using bq30z55 can't wake up bq30z55 when cell voltage is lower than 2.6v in 2s1p battery. I had measured the PACK pin and top stack cell voltage as below picture.
In fact the bq30z55 is period wake up and shutdown because when chg-fet turn on the pack voltage will be draw down to cell voltage ,if the cell voltage is lower then start up voltage
then it wil immediately shutdown. My question is whether change bq30z55 to bq40z50-r1 or bq28z610 can prevent it and can wake up gauge even cell voltage is down to zero.
CH1(YELLOW) : PACK PIN
CH2(BLUE) : Top Stack Cell Voltage
Part Number:BQ294504
Hello Team,
My customer is requesting TI's part to replace S-8215A and S-8215B series product, I searched TI's website by cross reference and system show me the several parts with same function, such as: BQ294504, BQ7716, BQ7718, and BQ77PL157A4225.
For customer, same function is OK, so I checked their correct part number is: S-8215AAF-K8T2U and S-8215BAF-K8T2U. based on these 2 part number, can you suggest TI's correct part number to me? so I could promote them to my customer.
Very appreciate.
Martin
Part Number:TPS61253
Hello,
The datasheet for the TPS61253 calls out a paste aperture design that is slightly odd to us. It recommends that it should be square with rounded corners, not just a round aperture. We are using another device very similar to this one, YFF0030, that is a very similar package, just a higher ball count and subsequent increased dimensions.
Can you explain the thinking is behind this aperture design suggestion? Thank you!
Regards,
Ryan B.
Part Number:TPS54824
Per Equation 10 at this link: http://www.ti.com/lit/an/slyt664/slyt664.pdf
I would like to roughly budget the power lost in the bottom FET body diode in the TPS54824
Just first order values are fine.
For TPS54821 I have: For your reference, the typical dead time is 18 ns and voltage drop the diode is 0.7 V. So in your equation, VF=0.7, tDLYUpLo=tDLYLoUp=18n.
Stu
Part Number:LM5071
Hi
I have a FPGA device that is directly powered from the POE 3.3V output. We are currently using the LM5071 chip. When the feedback optoisolator fails or disconnected, the POE output would
be a 8volt triangular volt. This is above the max absolute of the FPGA and will completely destroy it. Is the any changes to the LM5071 evaluation circuit possible that would output 0v if the feed optoisolator fails or the feedback circuit fail?
Thanks
Tony
Part Number:BQ40Z50-R1
Does BQ40Z50-R1 support 400kHz mode? I set XL(bit 3) in SBS configuration to 1, but failed to communicate with it at 400kHz. Did I miss anything else?
Part Number:BQ24195
Hello!
We've made a board with power management block based on BQ24195. Here is the circuit:
On PMID we have 60uF ceramic + 220 uF electrolyte. VBUS gets powered from 5V source, we also have a battery connected.
The purpose is to charge the battery permanently and get 5V from the battery when VBUS is off. Current consumptions are <500mA from PMID and <3A from SYS.
We have our host computer's power connected to PMID pin of BQ, but it gets off when VBUS gets off, and as we found out, this BQ cannot automatically switch to boost mode when VBUS turns off.
So, here is the questions:
1. Either boost or battery charging mode can be applied at the same time. Is that correct?
2. Is it wrong that we tied CE pin to ground and do not drive it from the host?
3. Can we somehow solve the problem with this or any other pin-compatible BQ?
4. It seems that BQ24295 is pin-compatible and has OTG and charge both enabled by default. But I'm a bit confused with that note: "3. Boost mode operation is enabled (OTG pin HIGH and REG01[5:4]=10)" which means that I have to turn off charging to enable boost, right?
5. Speaking about D+/D- detection. If we're not using them, do we have just to short it to make the highest input current limit? (We have pullups and 200 ohms there).
Thank you.
Part Number:LM34910C
I am trying ti use the LM34910 as a negative voltage generator/source. While i had been using the LMR14203 successfully for the same purpose, I need to provide more current so decided upon the LM34910C which we stick in-house.
When I apply voltage via bench power supply, current limited, I observe the switching attempting to start at about +7.5 Vin but rather than issuing a series of pulses it generated a single pulse, periodically, and i have no 'negative boost result. The virtual ground of this configuration is about 1V positive and makes no attempt to become more negative. My schematic is attached for bothe the LMR14203 and LM34910. I do hope you can help me make this work. Thank you. Jaye ( of course this is quite urgent ).
p.s. sorry the schematics preceded but this is the first time I have used the insert function with this forum.
Part Number:BQ27750
Hello,
I have found that other TRM's in the bq27XXX family explicitly describe whether or not factory calibration is needed. bq27546-G1 requires calibration (Appendix A), bq27542-G1 shouldn't require but can be calibrated (Section 14.1), bq27426-G1 doesn't require & can't be calibrated (Section 7.4.5.2), etc.
I haven't found this information in the bq27750 TRM, does this particular gauge require factory calibration for voltage, current, and/or temperature?
Thank you,
Andrew Elgar
Part Number:BQ24160
Tool/software: Code Composer Studio
I am using the BQ24160 Battery Charger to charge a 3.7 Li polymer battery and I'm not seeing it reach the full voltage set in the Control/Battery Voltage Register (03). I set the value to 3.8V using the I2C bus and then set a Watchdog Timer reset to the Status/Control Register every one second. The battery charges to the default 3.6V but then stops charging after that.
I can manually charge the battery to 4.0V without a problem using a CV/CC power supply.
I'm sending one register byte and one data byte to slave address 0x6B. I've looked at the I2C commands to the BQ24160 with a scope and they appear correct and the BQ24160 ACKs all the commands.
I have the external FET controlled by BGATE installed. The SYS voltage is sitting at 3.9V and the BAT voltage usually around 3.58V~3.68V.
Hopefully someone has insights on what the problem is. I'm not sure what should happen when the battery falls below the regulation voltage. I would assume the battery charger tries to maintain the 3.8V .
Here is the code I am using on an MSP430F5659:
unsigned int BQ2416_reset[] = { 0x02, 0x80 }; // Control Register > Reset all registers to default
unsigned int BQ2416_defaults[] = { 0x02, 0x0D }; // Control Register > Enter Hi-Z Mode, defaults
unsigned int BQ2416_current[] = { 0x02, 0x2C }; // Control Register > Leave Hi-Z Mode, 500mA current limit
unsigned int BQ2416_voltage[] = { 0x03, 0x3C }; // Battery Voltage Register > Charge Voltage = 3.8V
// I2C Write to Battery Charger
void I2C_write(int byteCount, unsigned int *data)
{
B1_Tx_Data = data; // TX data array address
B1_ByteCtr = byteCount; // load TX byte counter
UCB1IE |= UCTXIE; // Enable TX interrupt
UCB1CTL1 |= UCTR | UCTXSTT; // I2C TX, start condition
_delay_cycles(1500); // allow transmission completion
while (UCB1STAT & UCBBUSY); // wait for transmission to complete
}
// Battery Initialization
void initBattery(void)
{
P8DIR |= BIT5 | BIT6; // P8.5 to UCB1SDA and
P8SEL |= BIT5 | BIT6; // P8.6 to UCB1SCL
UCB1CTL1 |= UCSWRST; // Enable SW reset
UCB1CTL0 = UCMST | UCMODE_3 | UCSYNC; // I2C Master, synchronous mode
UCB1CTL1 = UCSSEL_2 | UCSWRST; // Use SMCLK, keep SW reset
UCB1BR0 = 40; // fSCL = SMCLK/40 = ~100kHz
UCB1BR1 = 0; // high byte of word
UCB1I2CSA = 0x6B; // BQ24160 Slave Address is 6Bh
UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB1IE |= UCNACKIE | UCTXIE; // Enable TX interrupt, NACK interrupt
UCB1IFG &= ~UCTXIFG; // Clear USCI_B1 TX interrupt flag
// Control Register > Reset all registers to default (0x02, 0x80)
I2C_write(2, BQ2416_reset); // I2C write data to register
// Control Register > Enter Hi-Z Mode, defaults (0x02, 0x0D)
I2C_write(2, BQ2416_defaults); // I2C write data to register
// Control Register > Leave Hi-Z Mode, 500mA current limit (0x02, 0x2C)
I2C_write(2, BQ2416_current); // I2C write data to register
// Battery Voltage Register > Charge Voltage = 3.8V (0x03, 0x3C)
I2C_write(2, BQ2416_voltage); // I2C write data to register
}
#pragma vector = USCI_B1_VECTOR
__interrupt void USCI_B1_ISR(void)
{
switch(__even_in_range(UCB1IV,12))
{
case 0: break; // Vector 0: No interrupts
case 2: break; // Vector 2: ALIFG
case 4: break; // Vector 4: NACKIFG
case 6: break; // Vector 6: STTIFG
case 8: break; // Vector 8: STPIFG
case 10: // Vector 10: RXIFG
if (UCB1STAT & UCNACKIFG) // send STOP if slave sends NACK
{
UCB1CTL1 |= UCTXSTP;
UCB1STAT &= ~UCNACKIFG;
}
break;
case 12: // Vector 12: TXIFG
if (B1_ByteCtr) // Check TX byte counter
{
UCB1TXBUF = *B1_Tx_Data++; // Load TX buffer
B1_ByteCtr--; // Decrement TX byte counter
}
else
{
UCB1CTL1 |= UCTXSTP; // I2C stop condition
UCB1IFG &= ~UCTXIFG; // Clear USCI_B1 TX int flag
}
default: break;
}
}
Part Number:TPS51200
Hi,
Designing a DDR4 memory interface using TPS51200 for VTT power and reference.
A colleague suggested we might want to margin the VTT so we set optimum voltage.
Anybody comment if this is a good idea and if yes please provide a circuit to do this - ideally something software could set "on-the-fly" during testing.
Thanks