Part Number:BQ78350-R1
I am building a battery pack consisting of 4 52Ah. 3.73V Liion batteries. I have been using the bq76920evm and have hooked up to my batteries and am trying to configure
The max design capacity in register 0x45CC is lower than my cell capacity. Is there a way to scale this. Or do I need to change devices?
Hello,
Need a solution for a boost converter which should operate on single phase rectified ac as well as three phase rectified ac. Came to know that UCC28180 is suitable for my operation but power of boost converter is large so I need to design a interleaved boost converter so looking for an IC which has features of UCC28180 and also suitable for two interleaved boost converter.
Thank you.
Part Number:BQ34110
Messrs TI,
I am developing a generic test tool for battery testing compatible with as much as possible battery chemistry and battery configurations (Series/Parallel).
I have selected BQ34110 with BQ76PL536A. Could you please verify my component selection?
I am thinking to use the ALERT pins of BQ34110 in order to drive CHARGE MOSFET protection, and the latter for DISCHARGE MOSFET PROTECTION. Is correct my setup idea of configuration for the BQ34110?
Regards
Luigi
Part Number:BQ78350-R1
on the BQ78350-R1 is design capacity per cell or per pack and same for design voltage per cell or per pack.
Part Number:TPS62802
I have designed the circuit so it is fixed at 1.8V output. ON power up of the board 1.8V shows at the output and after 10 seconds or so it increases to 3.3V output. Layout is the same as the preferred layout. 
Part Number:BQ25710
Good afternoon,
I'm working on a application which uses a BQ25710 charger to power a PCB and a battery. The charger should transform 24V adapter voltage to 12V system voltage.
However during testing it has come clear that I don't get the desired output voltage, I only get 0,1V of output Voltage. When I lower the input voltage to 12V I get 0,2V of output voltage. I found that the gate of mosfet Q1 only gets 0,2V. whichs seems a little less to me. Mosfet Q4 is fully on. So far I didn't connect a battery to the circuit. For the design I used the example shown in the datasheet.
I found that I used different resistor values at the voltage divider connected to Cell_BatPresz. I used a 1kohm and 820ohm resistor to get 55% of the VDDA voltage at pin Cell_batPresz. The datasheet shows resistors with values larger than 100kohm. In my opinion the only difference it should make is that a larger current will occure.
Some more questions:
- What will happen with VDDA when no battery is connected, will it stay at app. 6V or should it get 0V?
- If the Cell_BatPresz is low, will the charger still provide system voltage to the PCB?
I hope someone can help me solving this issue.
Kind regards
Pim
Part Number:BQ20Z655-R1
Hi BQ team,
I have a battery which uses the BQ20Z655-R1 and I am building an application to run calibration automatically. However the document which describes the process does not appear to match what the BQ evaluation software implementation. To make further progress I will need additional documentation on the calibration mode of this device. Can you post the information here or let me know who to reach out to directly?
Thanks,
HSG
Part Number:TPS65130
Can INP_1 / INP_2 and INN_1 / INN_2, i.e, pin 1 & 24 and pin 5&6 share same net ( Vin ) through input inductor? Also at pin 4 (VIN) does RC forms a filter or limits current going into VIN?
Thank you,
Sagar
Part Number:BQ40Z80EVM-020
Hi TI experts,
I set EVM board CUV delay is 1sec, but the test result is 2.2 sec. Why is so longer than my setting? I used DC=24V and six 1k ohm resistor to simulate battery, and parallel a switch at cell1 which series a 1k ohm for CUV test. CUV will happen when I turn on the switch. Below waveform is test result, CH1=Cell1, CH2=DSG mosfet Gate voltage, CH3=DSG mosfet Source voltage, CH4=Pack+. Pack+ without load and without SMBus communicate. I find TRM has a chapter "Sample Filter Settings", is it relate CUV delay longer than setting?
(Please visit the site to view this file)
Hi, I am requesting help to create a battery charger and load sharing circuit with the following specifications:
I am currently considering this design:
I would appreciate any help on confirming or denying the viability of this design as well as any suggestions on any improvements that can be made for simplicity.
Part Number:CSD17308Q3
I'm working on the next version of a wireless charger (board level design) at Earlens Corporation and have almost all of the critical components modeled with the exception of the CSD17308Q, to complete my analysis I need an unencrypted model. My understanding is that Earlens has an NDA with TI. I started with TI support.
My last message to TI support:
Earlens is not planning on purchasing Pspice and Tina is unexceptionable: we use Mentor Graphics, and LTspice. Earlens has invested much time and money with these tools and solutions. I have already searched your Spicerack and encrypted PSPICE and Tina models are the only avalable ones from TI. Please honor my request for an unencrypted SPICE model. My only other alternative is to design out the CSD17308Q3 part.
Their response:
To be able to help you acquired an unencrypted format, we would advise you to post your inquiry on our E2E forum. Our E2E community is constantly reviewed and managed by Texas Instruments specialists according to product and is further supported by engineers from around the world sharing their knowledge and experience. You may refer below for the E2E forum link
Regards,
Doug
Part Number:BQ25570
Hi,
insufficient input power
I want to know how can i avoid cold start .The following is the original data sheet. I want to know the detailed circuit diagram. appreciate！
我想要下面这段数据手册原文中的电路连接图，来避免冷启动，因为我的输入电压太低，vin_dc太低。感谢·感谢
The cold start circuit initially clamps VIN_DC to VIN(CS) = 600 mV typical. If sufficient input power (that is, output current from the harvester clamped to VIN(CS)) is not available, it is possible that the cold start circuit cannot raise the VSTOR voltage above VSTOR_CHGEN in order for the main boost conveter to start up. It is highly recommended to add an external PFET between the system load and VSTOR. An inverted VBAT_OK signal provided by VB_SEC_ON can be used to drive the gate of this system-isolating, external PFET.
My current circuit diagram（我现在还没加上面描述电路的初级电路图）：
Part Number:LM73606-Q1
Hello Frank,
After some simulations using the LM73606-Q1 spice model I have some follow-up question.
If the sense resistor is located immediately after the inductor it sees large current bursts which are problematic for accurate sensing and also for the sense resistor current limit.
Is it ok to have the following configuration:
Inductor -> decoupling capacitors -> sense resistors -> more decoupling capacitors -> load
Can I trust the LM73606-Q1 spice model to accurately represent waht I want to do?
Note: I must use the regulator in forced PWM
Thank you
Part Number:LM53600-Q1
I would like to use the LM53601-Q1-ADJ to produce 3.0V from an input voltage of Vin = 12V +/-15% (10.2 < Vin < 13.8 V). The desired output voltage is slightly below the recommended operating conditions given in Section 7.3 of the data sheet, but note 3 following the table suggests this should be possible and recommends contacting TI for details.
Output capacitance will be > 40 uF and I intend to use a Bourns SRP4012TA-4R7M 4.7 uH inductor having a saturation current of 2.5 A. I plan to drive the SYNC input at 1.95 MHz so the converter will operate in FPWM mode at constant frequency even under light load conditions.
I see that a similar question was asked on the e2e form but for the LM53600 operating at 3.1V. I understand bias current would be supplied by the +12V input when output voltage is less than 3.2 V which will be acceptable in this case. Also, duty cycle should be no less than 20% across input voltage range and at the indicated clock frequency, on time should be more than 100 ns which exceeds specified minimum given in Table 7.7.
Do you expect any issues with using the LM53601 as described above?
Part Number:TPS659039-Q1
We want to read the SMPS channel output voltage value of the PMIC, but we don't understand the contents of the VSEL value in the VOLTAGE Register of the Register Map.
Question 1: In the screenshot below, does the content marked in yellow mean the range value?
Question 2: Why are there many groups of VSELs equal to 0.70V/1.4V? We think that such voltage values seem to be meaningless for monitoring.
Part Number:BQ40Z50-R1
Hi!!
I have a large number of bq40z50-R1 packs that need processing. The default Unseal and FullAccess codes have been changed on some of these packs. I have trying to unseal these packs with software.
I would think I could unseal a pack by sending the default codes. If that doesn't work, then send the revised codes. However, there appears to be requirement with the fuel gauge where some time must elapsed after an invalid code is received and the next code code accepted. This makes sense for security to keep someone from "hammering" on the pack until the codes are received.
But, my question is How much time must elapse between an Invalid Unseal/FA code and the valid Unseal/FA code?
Thanks for your help!!
Phil
Part Number:TPS54331
Hi team,
My customer is using TPS54331 to convert 24V input to 20V output. But in customer's use case, sometimes the output side may be mistakenly added a 24V voltage(Vin and EN are not powered at this moment). So is there any risk the 24V voltage at the output side will do harm to TPS54331 or the periphery component when there is no input voltage? Thanks.
Best regards,
Wayne