Hi
I am frequently getting spike/glitch on data line.
In the picture mentioned below, I have marked the spike with red
I have also encountered data transition when the clock is low after 9th clock, which i suppose is because the master lets the data line float for the slave to acknowledge.
Image may be NSFW.
Clik here to view.
Any theories on what might cause that sort of spike?
I2C Settings:
SCL - 100KHz
Pull up at SDA and SCL line 4.7Kohm